f2f2
15th February, 2021, 10:51 PM
https://video.fbud5-1.fna.fbcdn.net/v/t42.1790-2/149145441_885796352234390_1718854456915957473_n.mp 4?_nc_cat=100&ccb=3&_nc_sid=985c63&efg=eyJ2ZW5jb2RlX3RhZyI6InN2ZV9zZCJ9&_nc_ohc=JkQtNTtZQVQAX_o8_JS&_nc_ht=video.fbud5-1.fna&oh=28d799981729e9b0754e45c75482b90c&oe=602B02AE
(https://video.fbud5-1.fna.fbcdn.net/v/t42.1790-2/149145441_885796352234390_1718854456915957473_n.mp 4?_nc_cat=100&ccb=3&_nc_sid=985c63&efg=eyJ2ZW5jb2RlX3RhZyI6InN2ZV9zZCJ9&_nc_ohc=JkQtNTtZQVQAX_o8_JS&_nc_ht=video.fbud5-1.fna&oh=28d799981729e9b0754e45c75482b90c&oe=602B02AE)
need
8Mhz Clock signal
fix +7.6 - +10.0 V for IRQ
Reset and Vdd works 2-2 Mosfet (1pos 1 neg)
TTL RST ->mcu RESET
TTL DTR ->mcu Vdd
(https://video.fbud5-1.fna.fbcdn.net/v/t42.1790-2/149145441_885796352234390_1718854456915957473_n.mp 4?_nc_cat=100&ccb=3&_nc_sid=985c63&efg=eyJ2ZW5jb2RlX3RhZyI6InN2ZV9zZCJ9&_nc_ohc=JkQtNTtZQVQAX_o8_JS&_nc_ht=video.fbud5-1.fna&oh=28d799981729e9b0754e45c75482b90c&oe=602B02AE)
need
8Mhz Clock signal
fix +7.6 - +10.0 V for IRQ
Reset and Vdd works 2-2 Mosfet (1pos 1 neg)
TTL RST ->mcu RESET
TTL DTR ->mcu Vdd