Not that susceptible to power glitch i guess. Thinking how things work, i suspect the trick is that after certain ammount of heat the microprocessor cannot read properly the flash content upon initialization, if just one single bit of the CRP3 pattern gets changed/corrupted the bootloader not enter/obey CRP3 mode inmediately and allow bootmode to kick in. Guess after that, the only operation allowed without recheck for CRP3 pattern again is FULL ERASE, that's why you cannot read MCU content once it cooled and have access to flash again. This is all theory/educated guess, haven't tested myself over a real MCU.