VAG-COM/VCDS EVERYTHING

**liviudiaconu** · 6th January, 2019, 10:05 AM

Originally Posted by Elektrik1

liviudiaconu, ,yeah PIN 15 there should be, typo. Sorry forgot to post the header, this is full project:

Code:

Name     0x46 ;
PartNo   00 ;
Date     2019-01-02 ;
Revision 01 ;
Designer Elektrik ;
Company  * ;
Assembly None ;
Location  ;
Device   g16v8a ;

/* *************** INPUT PINS *********************/
PIN 2    = i2                        ; /*                                 */ 
PIN 3    = i3                        ; /*                                 */ 
PIN 5    = i5                        ; /*                                 */ 
PIN 6    = i6                        ; /*                                 */ 
PIN 7    = i7                        ; /*                                 */
PIN 8    = i8                        ; /*                                 */ 
PIN 11   = !i11                       ; /*                                 */ 

/* *************** OUTPUT PINS *********************/
PIN 12   = o12                       ; /*                                 */ 
PIN 13   = o13                       ; /*                                 */ 
PIN 14   = f14                       ; /*                                 */
PIN 15   = o15                       ; /*                                 */ 
PIN 16   = o16                       ; /*                                 */ 
PIN 17   = f17                       ; /*                                 */ 
PIN 18   = o18                       ; /*                                 */
PIN 19   = f19                       ; /*                                 */ 

!o18 = i11 & !i8;
!o16 = (i11 & !i7) # (!i6 & !i5 & !i2);
!o15 = !i5;
!o13 = (!f17 & !i6 & !i2) # !f14;
!o12 = !f17 & !i2;

i11 is inverted in pin definition.

OK. What you do'it in definitions is what i obtained by following your formulas and modifying equations.
With your present equations i obtained the same file..

With ONE exception: lines 768 and 800 REVERSED. Yes, this two lines reffer at the same OUT but, why in my generator appear reversed?

Can you, please, send me your settings in WinCUPL?
Thank you..

A question:
When obtained truth-table of 46 GAL you run ALL combinations? I mean including pin 3 and pin 19 influences?

An idea: for see if .jed is correctly generatde try to obtain the same tables as with original.
Compare. If the same results, the equations are OK.

**hid3** · 6th January, 2019, 06:30 PM

Does anyone own a genuine HEX-V2 and is willing to help?
If so, please write me a PM directly.
Thank you.

**Elektrik1** · 6th January, 2019, 07:34 PM

To match 100% input-output correlation (all 262144 combinations on app pins) to original 0x46 GAL, some additions were added, final code which confirms it is 1:1 clone:

Code:

Name     0x46 ;
PartNo   00 ;
Date     2019-01-02 ;
Revision 01 ;
Designer Elektrik ;
Company  * ;
Assembly None ;
Location  ;
Device   g16v8a ;

/* *************** INPUT PINS *********************/
PIN 2    = i2                        ; /*                                 */ 
PIN 3    = i3                        ; /*                                 */ 
PIN 4    = i4                        ; /*                                 */ 
PIN 5    = i5                        ; /*                                 */ 
PIN 6    = i6                        ; /*                                 */ 
PIN 7    = i7                        ; /*                                 */
PIN 8    = i8                        ; /*                                 */ 
PIN 11   = !i11                       ; /*                                 */ 

/* *************** OUTPUT PINS *********************/
PIN 12   = o12                       ; /*                                 */ 
PIN 13   = o13                       ; /*                                 */ 
PIN 14   = f14                       ; /*                                 */
PIN 15   = o15                       ; /*                                 */ 
PIN 16   = o16                       ; /*                                 */ 
PIN 17   = f17                       ; /*                                 */ 
PIN 18   = o18                       ; /*                                 */
PIN 19   = f19                       ; /*                                 */ 

!o18 = i11 & !i8;
!o16 = (i11 & !i7) # (!i6 & (!i5 # !i4) & !i2);
!o15 = !i5 # !i4;
!o13 = (!f17 & !i6 & !i2) # !f14;
!o12 = !f17 & !i2;

0x46 JED:

Code:

CUPL(WM)        5.0a  Serial# 60008009
Device          g16v8as  Library DLIB-h-40-2
Created         Sun Jan 06 19:17:12 2019
Name            0x46 
Partno          00 
Revision        01 
Date            2019-01-02 
Designer        Elektrik 
Company         * 
Assembly        None 
Location        
*QP20 
*QF2194 
*G0 
*F0 
*L00256 11111111111111111111111110111110
*L00768 11111111111111111111101111111110
*L00800 10111111101111111011111111111111
*L00832 10111111111110111011111111111111
*L01024 11111111111110111111111111111111
*L01056 11111111101111111111111111111111
*L01536 10111111111111101011111111111111
*L01568 11111111111111111110111111111111
*L01792 10111111111111101111111111111111
*L02048 00000000001100000011000000100000
*L02112 00000000101001001111111111111111
*L02144 11111111111111111111111111111111
*L02176 111111111111111110
*C299A
*AFE8

Don't know why it also responds on signals on pin 4 as well (which is not connected), maybe for some hybrid china clones, don't know. Attaching .JED project, which can be opened with WinCupl (open as project), also leaving pin combinational responses for original 0x46, compiled with this code 0x46, also performed check of original 0x44 response tables, and C3H8 compiled logic response (which I do confirm corresponds 100% to all original 0x44 input-outputs).

All decimals represented in such was:

DEC	PIN19	PIN18	PIN17	PIN16	PIN15	PIN14	PIN13	PIN12	PIN11	PIN9	PIN8	PIN7	PIN6	PIN5	PIN4	PIN3	PIN2	PIN1
0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0
1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1
2	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0
...
262143	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1

**liviudiaconu** · 6th January, 2019, 11:00 PM

pin 4 not used in "46".
Still nothing about pins 3 and 19.
I think must be like in "44" equations for 12 and 13..

Something like

Code:

! p12 = ((p17#p2)&(p19#p3));
! p13 = (p17#p2#p6)&(p19#p3#p6)& p14;

**porkyseen62** · 6th January, 2019, 11:08 PM

thanks kolimer , good job

**Elektrik1** · 6th January, 2019, 11:30 PM

Pin 4 is not used, but is written in logic somewhy.

No pin19 and pin 3 usage in original GAL as well. I think it's normal, since LLine (19) input is not needed for any car afaik, it's onyl needed as an output for 5baud communication to wake up ECU. So only output. I may try to add logic you written, but perhaps test won't pass then. I have old ecu which needs LLine for wake up, and logic without 3 and 19 pins works fine there.

**BASi77** · 7th January, 2019, 12:38 AM

Perhaps the KKL protocol is no longer used, but there is software support in version HW46.

Code:

; =============== S U B    R O U T    I N E == HW:0X46

sub_229:                
        sbi    PORTA, PORTA4    
        lds    r24, Kx_ctrl
        clr    r25
        sbrs    r24, 5
        rjmp    loc_231
        cbi    PORTA, PORTA5 ; K-line select    
        rjmp    loc_232
; --------------------------------------

loc_231:                
        sbi    PORTA, PORTA6    

loc_232:                
        sbrs    r24, 6
        rjmp    loc_236
        cbi    PORTA, PORTA6 ; KL-line select    
        rjmp    loc_237
; --------------------------------------

loc_236:                
        sbi    PORTA, PORTA6    

loc_237:                
        lds    r24, Kx_stat
        clr    r25
        sbrs    r24, 2
        rjmp    loc_23E
        cbi    PORTA, PORTA0 ; K-line select 
        rjmp    loc_23F
; --------------------------------------

loc_23E:                
        sbi    PORTA, PORTA0

loc_23F:                
        sbrs    r24, 3
        rjmp    loc_243
        cbi    PORTA, PORTA1 ; KL-line select 
        ret
; --------------------------------------

loc_243:                
        sbi    PORTA, PORTA1    
        ret

; End of function sub_229

I propose to test this logic:

Code:

Name     0x46 ;
PartNo   00 ;
Date     2019-01-07 ;
Revision 01 ;
Designer XXX ;
Company  * ;
Assembly None ;
Location  ;
Device   g16v8a ;


/* *************** INPUT PINS **********************/
PIN 2    = i2  ; /* K-line select                  */ 
PIN 3    = i3  ; /* KL-line select                 */ 
PIN 4    = i4  ; /*                                */ 
PIN 5    = i5  ; /* FT_TXD                         */ 
PIN 6    = i6  ; /* FTDI <-> KKL enable            */ 
PIN 7    = i7  ; /* K-line select                  */
PIN 8    = i8  ; /* KL-line select                 */ 
PIN 11   = i11 ; /* TXD1                           */ 


/* *************** OUTPUT PINS *********************/
PIN 12   = o12 ; /* RXD1                           */ 
PIN 13   = o13 ; /* FT_RXD                         */ 
PIN 14   = f14 ; /* TXD0                           */
PIN 15   = o15 ; /* RXD0                           */ 
PIN 16   = o16 ; /* TX1 K-line                     */ 
PIN 17   = f17 ; /* RX1 K-line                     */ 
PIN 18   = o18 ; /* TX2 KL-line                    */
PIN 19   = f19 ; /* RX2 KL-line                    */ 


o18 = ( i11 # i8 ) & ( i6 # ( i5 & i4) # i3 );
o16 = ( i11 # i7 ) & ( i6 # ( i5 & i4) # i2 );
o15 = i5 & i4;
p13 = ( p17 # p2 # p6 ) & ( p19 # p3 # p6 ) & p14;
p12 = ( p17 # p2 ) & ( p19 # p3 );

**Elektrik1** · 7th January, 2019, 12:59 AM

Originally Posted by BASi77

Perhaps the KKL protocol is no longer used, but there is software support in version HW46.

I propose to test this logic:

I have modified it a bit, but it show this (does not work)

sshot-2019-01-07-01-56-41-1.jpg

Code:

Name     0x46 ;
PartNo   00 ;
Date     2019-01-02 ;
Revision 01 ;
Designer Elektrik ;
Company  * ;
Assembly None ;
Location  ;
Device   g16v8a ;

/* *************** INPUT PINS *********************/
PIN 2    = i2   ; /* K-line select                */ 
PIN 3    = i3   ; /* KL-line select               */ 
PIN 4    = i4   ; /* NC but exists in original    */ 
PIN 5    = i5   ; /* FT_TXD                       */ 
PIN 6    = i6   ; /* FTDI <-> KKL enable          */ 
PIN 7    = i7   ; /* K-line select                */
PIN 8    = i8   ; /* KL-line select               */ 
PIN 11   = i11 ; /* TXD1                         */ 

/* *************** OUTPUT PINS ********************/
PIN 12   = o12  ; /* RXD1                         */ 
PIN 13   = o13  ; /* FT_RXD                       */ 
PIN 14   = f14  ; /* TXD0                         */
PIN 15   = o15  ; /* RXD0                         */ 
PIN 16   = o16  ; /* TX1 K-line                   */ 
PIN 17   = f17  ; /* RX1 K-line                   */ 
PIN 18   = o18  ; /* TX2 KL-line                  */
PIN 19   = f19  ; /* RX2 KL-line                  */ 

o18 = ( i11 # i8 ) & ( i6 # ( i5 & i4) # i3 );
o16 = ( i11 # i7 ) & ( i6 # ( i5 & i4) # i2 );
o15 = i5 & i4;
p13 = ( f17 # i2 # i6 ) & ( f19 # i3 # i6 ) & f14;
p12 = ( f17 # i2 ) & ( f19 # i3 );

This might be because logic needs to be negated (all pins are pull-upped internally).

Edit: inverted gives positive result on green light and test passes:

Code:

!o18 = (!i11 & !i8) # (!i6 & (!i5 # !i4) & !i3);
!o16 = (!i11 & !i7) # (!i6 & (!i5 # !i4) & !i2);
!o15 = !i5 # !i4;
!o13 = (!f17 & !i2 & !i6) # (!f19 & !i3 & !i6) # !f14;
!o12 = (!f17 & !i2) # (!f19 & !i3);

And it does connect to my old KL-Line ECU just fine.

20190107_021607.jpg

A lot of differences to input-output combinatiosn to "original" chinese 46.
sshot-2019-01-07-02-44-11-1.jpg

Latest project source:

Code:

Name     0x46 ;
PartNo   00 ;
Date     2019-01-02 ;
Revision 01 ;
Designer Elektrik ;
Company  * ;
Assembly None ;
Location  ;
Device   g16v8a ;

/* *************** INPUT PINS *********************/
PIN 2    = i2   ; /* K-line select                */ 
PIN 3    = i3   ; /* KL-line select               */ 
PIN 4    = i4   ; /* NC but exists in original    */ 
PIN 5    = i5   ; /* FT_TXD                       */ 
PIN 6    = i6   ; /* FTDI <-> KKL enable          */ 
PIN 7    = i7   ; /* K-line select                */
PIN 8    = i8   ; /* KL-line select               */ 
PIN 11   = i11  ; /* TXD1                         */ 

/* *************** OUTPUT PINS ********************/
PIN 12   = o12  ; /* RXD1                         */ 
PIN 13   = o13  ; /* FT_RXD                       */ 
PIN 14   = f14  ; /* TXD0                         */
PIN 15   = o15  ; /* RXD0                         */ 
PIN 16   = o16  ; /* TX1 K-line                   */ 
PIN 17   = f17  ; /* RX1 K-line                   */ 
PIN 18   = o18  ; /* TX2 KL-line                  */
PIN 19   = f19  ; /* RX2 KL-line                  */ 

!o18 = (!i11 & !i8) # (!i6 & (!i5 # !i4) & !i3);
!o16 = (!i11 & !i7) # (!i6 & (!i5 # !i4) & !i2);
!o15 = !i5 # !i4;
!o13 = (!f17 & !i2 & !i6) # (!f19 & !i3 & !i6) # !f14;
!o12 = (!f17 & !i2) # (!f19 & !i3);

and .JED for it:

Code:

CUPL(WM)        5.0a  Serial# 60008009
Device          g16v8as  Library DLIB-h-40-2
Created         Mon Jan 07 02:05:26 2019
Name            0x46 
Partno          00 
Revision        01 
Date            2019-01-02 
Designer        Elektrik 
Company         * 
Assembly        None 
Location        
*QP20 
*QF2194 
*G0 
*F0 
*L00256 11111111111111111111111110111110
*L00288 11111011101111111011111111111111
*L00320 11111011111110111011111111111111
*L00768 11111111111111111111101111111110
*L00800 10111111101111111011111111111111
*L00832 10111111111110111011111111111111
*L01024 11111111111110111111111111111111
*L01056 11111111101111111111111111111111
*L01536 10111111111111101011111111111111
*L01568 11111010111111111011111111111111
*L01600 11111111111111111110111111111111
*L01792 10111111111111101111111111111111
*L01824 11111010111111111111111111111111
*L02048 00000000001100000011000000100000
*L02112 00000000101001001111111111111111
*L02144 11111111111111111111111111111111
*L02176 111111111111111110
*C37E2
*CEE9

Conclusion: my original GAL did not have this LLine readout functionality, only output wakening (5BAUD init sequence) functionality, which did also worked fine.

**liviudiaconu** · 7th January, 2019, 07:23 AM

I saw in the past more schemathics named "original"..for 44 and 46 too..

Only one of them having pin 4 pulled-up external too. Attached..
See ONLY pin 4 is pulled-up externaly. That make me think is used in logical as 1. pins 1 and 9 not used, so..not connected.

And another thing: the programm having a button named "OBD II". Is for generic and, as i saw work only for engine for other cars.
When i am lazzy time to time erase DTC for engine for my old Corsa 2001.
Is very possible using LLine for this "OBD generic"..
Is very possible too RT excluded the LLine support in 46 HW. I don't remember when 46 released..If someone having old installers can see in wich version appear HPxxx.bin. But this not explain why LLine circuit still exist.
Is very possible too, chineses tried extract dump or a person for them..and..extracted truncated or truncated by himself for this motive ("is old, no need")

**kaalis** · 7th January, 2019, 08:25 AM

Originally Posted by Elektrik1

And it does connect to my old KL-Line ECU just fine.

20190107_021607.jpg

mmm, 16v from dinosaur age.
Haven't tried connecting it yet. But thanks for picture.

**kaalis** · 7th January, 2019, 10:27 AM

Originally Posted by liviudiaconu

Is very possible too, chineses tried extract dump or a person for them..and..extracted truncated or truncated by himself for this motive ("is old, no need")

I have old NEC clone hex-v2 fake. In Kolimer hw info tool it shows up as 0x46. K2 (L) didn't work in even when cable was brand new. Now something has fried inside and voltage regulator has 7V in input and 5V in output.

K1 sometimes work, sometimes not. Shi##y cable.

**Elektrik1** · 7th January, 2019, 02:51 PM

Originally Posted by liviudiaconu

I saw in the past more schemathics named "original"..for 44 and 46 too..

Only one of them having pin 4 pulled-up external too. Attached..
See ONLY pin 4 is pulled-up externaly. That make me think is used in logical as 1. pins 1 and 9 not used, so..not connected.

And another thing: the programm having a button named "OBD II". Is for generic and, as i saw work only for engine for other cars.
When i am lazzy time to time erase DTC for engine for my old Corsa 2001.
Is very possible using LLine for this "OBD generic"..
Is very possible too RT excluded the LLine support in 46 HW. I don't remember when 46 released..If someone having old installers can see in wich version appear HPxxx.bin. But this not explain why LLine circuit still exist.
Is very possible too, chineses tried extract dump or a person for them..and..extracted truncated or truncated by himself for this motive ("is old, no need")

No need for external pull-up resistor, GAL chips have internal weak (~50K) pullup to VCC.

**liviudiaconu** · 7th January, 2019, 03:26 PM

In this case, why RT mounted 1K on pin 4 to +?

**Elektrik1** · 7th January, 2019, 03:36 PM

Originally Posted by liviudiaconu

In this case, why RT mounted 1K on pin 4 to +?

sshot-2019-01-07-16-32-42-1.jpg

Because GAL chips have ACTIVE pull-ups, resistor is an PASSIVE pull-up, it ensures always logical 1 on pin 4 even if VCC glitches occur (very small chance), it's just right way to terminate floating pins. Wonder why they didn't do it as well on pin 1 and 9, but perhaps that's because only PIN 4 is affecting logic (still not sure why it's defined in logic if it has static state, but it's question for RT).

**liviudiaconu** · 8th January, 2019, 07:32 AM

RT never answer you or me..we know why..
We can suppose: maybe RT prepared logical for another pin (pin 4 in this case) and:
-the developing of that logic never applied.
-this logical applied for first series of "46" and after RT eliminated pin 4 from this and pulled up.